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Schematic review round 2: US resistors, decoupling placement, VERIFY checklist, gitignore - #2

Merged
NT7S merged 27 commits into
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rev-a-schematic
Oct 25, 2026
Merged

NT7S merged 27 commits into
masterfrom
rev-a-schematic

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@NT7S

@NT7S NT7S commented Oct 24, 2026

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Changes

  • All resistors switched to small US-style symbols (values, footprints, LCSC unchanged)
  • Net-labeled decoupling caps relocated next to their ICs, with PCB placement notes
  • docs/VERIFY.md converted to a checklist with comment lines; finalized items ticked
  • Finalized VERIFY notes removed from the schematic sheets
  • .gitignore for KiCad; lock, autosave and backup files untracked (kept on disk)
  • Regenerated schematic PDF, netlist, SVGs, ERC report (0 errors, 2 logo-library warnings)
  • tools/export_docs.sh to regenerate docs/ after every schematic change (noted in README)

Open items

  • R9, C22, C24, C14: investigate further
  • U4 UART pins: double-check
  • LPF item: no comment yet
  • Not yet applied: R27/R28 to 4.7k, 0805 for 0 ohm resistors, SMA footprint

KiCad EE and others added 19 commits October 23, 2026 18:40
…nalized VERIFY notes

- Device:R_Small -> Device:R_Small_US on all 30 resistors (same pin geometry; refs/values/fields/footprints/LCSC unchanged)
- Move label-connected decoupling caps next to their ICs: C10/C11 + C12/C13 at U3, C15/C16 at U4, C4 at U2
- Add PCB placement notes by U1, U5, U3, U4, U2/X1 and DS1 (pins from netlist)
- Remove VERIFY note lines and VERIFY fields for items Jason finalized:
  J1 D1 C10 U3 FB2 DS1 C17 SW1 X1 C100 R101 L1 C105
- Netlist identical to 4963a6d; ERC 0 errors
… parts, 4.7k I2C, 0805 0R, Etherkit SMA footprint

- R9 /RST pull-up moved from +5V to CP_VDD (CP2102N DS 2.1, Table 3.10)
- New R29 1k (C21190) between C14 and PB4 to limit DTR-rise injection current (ATtiny3226 DS Table 33-1)
- C24 fitted 22u 1206 (C12891); C22/C23 kept 2x4.7u
- R13 0603 C23179, D4 1N5711W SOD-123 C154843, J5 1x4 pin header C124378
- R27/R28 4.7k C17673; R100/R120/R140 0805 0R C17477; R101/R121/R141 LCSC C17437 (DNP)
- J2-J4 footprint EtherkitKicadLibrary:SMA-ENDLAUNCH
- H1-H4 and solder jumpers excluded from BOM
- Finalized VERIFY notes removed from sheets; VERIFY.md items ticked with KiCad EE notes
…eview, title block, clear finalized VERIFY fields, LPF closed
….3V LP2985 rail; silkscreen pin-name note; VERIFY DS1 supply resolved; regen docs
…D_RES on PA6, PA2 freed; remove R26/FS0/CS2; DNP supplied in kit; VERIFY + regen docs
KiCad EE added 8 commits October 23, 2026 20:23
…124+JP125, JP144+JP145) with CLKn_BYP lane net, isolating the lane at both ends; regen docs
…3V3_CLK after FB1, caps inline at the U2 supply pins; RF50 netclass (0.31 mm) incl. CLK0-2_BYP lanes; regen docs
…e series R and VDDO cap fit at U2's 0.5 mm-pitch CLK/VDDO pins; regen docs
…-SW4 values SOFT1-SOFT3 (labels drawn on the OLED); regen docs, ERC 0
@NT7S
NT7S merged commit 20cd533 into master Oct 25, 2026
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